ForthForge - Building a Forth MicroComputer in a Xilinx FPGA
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For a quick start with a development board Xilinx iMPACT may be used to download an '.mcs' configuration file to spi flash memory, from which the FPGA will be configured, on power-up. The apropriate '.mcs' file should be chosen from the options below. The flash memory size is required for iMPACT and the comms settings for HyperTerminal. If you wish to use Forth in an FPGA not listed below it will be necessary to start with the VHDL files available for download on the VHDL source file page and synthesise & implement a version to suit your target FPGA.

FPGA = XC3S500E-FGG320-4C
Flash = XCF04S (4Mbit)
Communication setting: Baud Rate = 9600, 8 Data bits, No Parity, 1 Stop, No Flow Control

FPGA = XC3S700A-FGG484-4C
Flash = XCF04S (4Mbit)
Communication setting: Baud Rate = 9600, 8 Data bits, No Parity, 1 Stop, No Flow Control

FPGA = XC6SLX16-CS324-2CES
Flash = W25Q64VSFIG (64Mbit) set M1=0 & M0=1
Communication setting: Baud Rate = 19200, 8 Data bits, No Parity, 1 Stop, No Flow Control
(Use CALL in HyperTerminal to start comms.)

The following functional test, text file may be downloaded to the Forth micro using Hyperterminal.
First set the connection Properties\Settings\ASCII Setup\Line Delay to 20ms.
Re-connect then select the drop down menu item Transfer and select Send Text File..

On successful completion of the test the terminal screen should read: